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mirror of https://github.com/Utyff/Zintercom.git synced 2026-01-12 01:07:43 +03:00
This commit is contained in:
lost
2021-03-23 21:20:52 +02:00
parent 2da6439540
commit 17fe7c10c1
2 changed files with 13 additions and 13 deletions

View File

@@ -10,25 +10,25 @@
<project>GenericApp</project>
<configuration>Zintercom_Router</configuration>
</member>
<member>
<project>GenericApp</project>
<configuration>Zintercom_Router_PA1</configuration>
</member>
<member>
<project>GenericApp</project>
<configuration>Zintercom_Router_PA2</configuration>
</member>
<member>
<project>GenericApp</project>
<configuration>Zintercom_EndDevice</configuration>
</member>
<member>
<project>GenericApp</project>
<configuration>Zintercom_Router_CC2592</configuration>
<configuration>Zintercom_EndDevice_PA1</configuration>
</member>
<member>
<project>GenericApp</project>
<configuration>Zintercom_EndDevice_CC2592</configuration>
</member>
<member>
<project>GenericApp</project>
<configuration>Zintercom_Router_CC2591</configuration>
</member>
<member>
<project>GenericApp</project>
<configuration>Zintercom_EndDevice_CC2591</configuration>
<configuration>Zintercom_EndDevice_PA2</configuration>
</member>
</batchDefinition>
</batchBuild>

View File

@@ -242,15 +242,15 @@ extern void MAC_RfFrontendSetup(void);
P1DIR |= BV(0) | BV(1); \
\
/* Set PA/LNA HGM control P0_7 */ \
P0DIR |= BV(7); \
P0DIR |= BV(7); \
\
\
/* setup RF frontend if necessary */ \
HAL_BOARD_RF_FRONTEND_SETUP(); \
LED1_DDR |= LED1_BV; \
LED2_DDR |= LED2_BV; \
LED3_DDR |= LED3_BV;
LED4_DDR |= LED4_BV; \
LED3_DDR |= LED3_BV; \
LED4_DDR |= LED4_BV; \
}
#elif defined (HAL_PA_LNA_CC2592) || defined (HAL_PA_LNA_SE2431L)