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base: rad:0.2.1
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rad:master rad:Utyf
rad:v2.0.0 rad:beta_1 rad:1.0.4 rad:untagged-c03a5af7e974f2509f20 rad:2.0.0 rad:1.0.3 rad:1.0.2 rad:1.0.1 rad:1.0.0 rad:0.2.2 rad:0.2.1
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rad:v2.0.0 rad:beta_1 rad:1.0.4 rad:untagged-c03a5af7e974f2509f20 rad:2.0.0 rad:1.0.3 rad:1.0.2 rad:1.0.1 rad:1.0.0 rad:0.2.2 rad:0.2.1

1 Commits
0.2.1 ... 0.2.2

Author SHA1 Message Date
lost
17fe7c10c1 0.2.2 2021-03-23 21:20:52 +02:00
2 changed files with 13 additions and 13 deletions
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20
CC2530DB/GenericApp.eww
View File

@@ -10,25 +10,25 @@
<project>GenericApp</project>
<configuration>Zintercom_Router</configuration>
</member>
<member>
<project>GenericApp</project>
<configuration>Zintercom_Router_PA1</configuration>
</member>
<member>
<project>GenericApp</project>
<configuration>Zintercom_Router_PA2</configuration>
</member>
<member>
<project>GenericApp</project>
<configuration>Zintercom_EndDevice</configuration>
</member>
<member>
<project>GenericApp</project>
<configuration>Zintercom_Router_CC2592</configuration>
<configuration>Zintercom_EndDevice_PA1</configuration>
</member>
<member>
<project>GenericApp</project>
<configuration>Zintercom_EndDevice_CC2592</configuration>
</member>
<member>
<project>GenericApp</project>
<configuration>Zintercom_Router_CC2591</configuration>
</member>
<member>
<project>GenericApp</project>
<configuration>Zintercom_EndDevice_CC2591</configuration>
<configuration>Zintercom_EndDevice_PA2</configuration>
</member>
</batchDefinition>
</batchBuild>

2
Source/hal_board_cfg.h
View File

@@ -249,7 +249,7 @@ extern void MAC_RfFrontendSetup(void);
HAL_BOARD_RF_FRONTEND_SETUP(); \
LED1_DDR |= LED1_BV; \
LED2_DDR |= LED2_BV; \
LED3_DDR |= LED3_BV;
LED3_DDR |= LED3_BV; \
LED4_DDR |= LED4_BV; \
}